uhd-firmware-4.7.0.0-2.fc41 in Fedora 41
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Package Info
🠗 Changelog
🠗 Dependencies
🠗 Provides
🠗 Files
Changelog
| Date | Author | Change |
|---|---|---|
| 2024-07-20 | Fedora Release Engineering <releng at fedoraproject dot org> - 4.7.0.0-2 | - Rebuilt for https://fedoraproject.org/wiki/Fedora_41_Mass_Rebuild |
| 2024-07-15 | Jaroslav Škarvada <jskarvad at redhat dot com> - 4.7.0.0-1 | - New version Resolves: rhbz#2293732 |
| 2024-06-08 | Python Maint <python dash maint at redhat dot com> - 4.6.0.0-4 | - Rebuilt for Python 3.13 |
| 2024-01-27 | Fedora Release Engineering <releng at fedoraproject dot org> - 4.6.0.0-3 | - Rebuilt for https://fedoraproject.org/wiki/Fedora_40_Mass_Rebuild |
| 2024-01-18 | Jonathan Wakely <jwakely at redhat dot com> - 4.6.0.0-2 | - Rebuilt for Boost 1.83 |
| 2023-11-21 | Jaroslav Škarvada <jskarvad at redhat dot com> - 4.6.0.0-1 | - New version Resolves: rhbz#2247579 |
| 2023-09-25 | Jaroslav Škarvada <jskarvad at redhat dot com> - 4.5.0.0-1 | - New version Resolves: rhbz#2237074 |
| 2023-07-22 | Fedora Release Engineering <releng at fedoraproject dot org> - 4.4.0.0-4 | - Rebuilt for https://fedoraproject.org/wiki/Fedora_39_Mass_Rebuild |
| 2023-06-14 | Python Maint <python dash maint at redhat dot com> - 4.4.0.0-3 | - Rebuilt for Python 3.12 |
| 2023-02-20 | Jonathan Wakely <jwakely at redhat dot com> - 4.4.0.0-2 | - Rebuilt for Boost 1.81 |
Dependencies
- uhd = 4.7.0.0-2.fc41
Provides
- uhd-firmware
Files
- usr/
- share/
- uhd/
- images/
- LICENSE
- bit/
- usrp_n200_r3_fpga.bit
- usrp_n200_r4_fpga.bit
- usrp_n210_r3_fpga.bit
- usrp_n210_r4_fpga.bit
- inventory.json
- octoclock_bootloader.hex
- octoclock_r4_fw.hex
- usrp1_fpga.rbf
- usrp1_fpga_4rx.rbf
- usrp1_fw.ihx
- usrp2_fpga.bin
- usrp2_fw.bin
- usrp_b100_fpga.bin
- usrp_b100_fpga_2rx.bin
- usrp_b100_fw.ihx
- usrp_b200_bl.img
- usrp_b200_fpga.bin
- usrp_b200_fpga.rpt
- usrp_b200_fw.hex
- usrp_b200mini_fpga.bin
- usrp_b200mini_fpga.rpt
- usrp_b205mini_fpga.bin
- usrp_b205mini_fpga.rpt
- usrp_b210_fpga.bin
- usrp_b210_fpga.rpt
- usrp_e310_sg1_fpga.bit
- usrp_e310_sg1_fpga.bit.md5
- usrp_e310_sg1_fpga.dts
- usrp_e310_sg1_fpga.dts.md5
- usrp_e310_sg1_fpga.rpt
- usrp_e310_sg1_idle_fpga.bit
- usrp_e310_sg1_idle_fpga.bit.md5
- usrp_e310_sg1_idle_fpga.dts
- usrp_e310_sg1_idle_fpga.dts.md5
- usrp_e310_sg1_idle_fpga.rpt
- usrp_e310_sg3_fpga.bit
- usrp_e310_sg3_fpga.bit.md5
- usrp_e310_sg3_fpga.dts
- usrp_e310_sg3_fpga.dts.md5
- usrp_e310_sg3_fpga.rpt
- usrp_e310_sg3_idle_fpga.bit
- usrp_e310_sg3_idle_fpga.bit.md5
- usrp_e310_sg3_idle_fpga.dts
- usrp_e310_sg3_idle_fpga.dts.md5
- usrp_e310_sg3_idle_fpga.rpt
- usrp_e320_fpga_1G.bit
- usrp_e320_fpga_1G.bit.md5
- usrp_e320_fpga_1G.dts
- usrp_e320_fpga_1G.dts.md5
- usrp_e320_fpga_1G.rpt
- usrp_e320_fpga_AA.bit
- usrp_e320_fpga_AA.bit.md5
- usrp_e320_fpga_AA.dts
- usrp_e320_fpga_AA.dts.md5
- usrp_e320_fpga_AA.rpt
- usrp_e320_fpga_XG.bit
- usrp_e320_fpga_XG.bit.md5
- usrp_e320_fpga_XG.dts
- usrp_e320_fpga_XG.dts.md5
- usrp_e320_fpga_XG.rpt
- usrp_n200_fw.bin
- usrp_n200_r2_fpga.bin
- usrp_n200_r3_fpga.bin
- usrp_n200_r4_fpga.bin
- usrp_n210_fw.bin
- usrp_n210_r2_fpga.bin
- usrp_n210_r3_fpga.bin
- usrp_n210_r4_fpga.bin
- usrp_n300_fpga_AA.bit
- usrp_n300_fpga_AA.bit.md5
- usrp_n300_fpga_AA.dts
- usrp_n300_fpga_AA.dts.md5
- usrp_n300_fpga_AA.rpt
- usrp_n300_fpga_HG.bit
- usrp_n300_fpga_HG.bit.md5
- usrp_n300_fpga_HG.dts
- usrp_n300_fpga_HG.dts.md5
- usrp_n300_fpga_HG.rpt
- usrp_n300_fpga_WX.bit
- usrp_n300_fpga_WX.bit.md5
- usrp_n300_fpga_WX.dts
- usrp_n300_fpga_WX.dts.md5
- usrp_n300_fpga_WX.rpt
- usrp_n300_fpga_XG.bit
- usrp_n300_fpga_XG.bit.md5
- usrp_n300_fpga_XG.dts
- usrp_n300_fpga_XG.dts.md5
- usrp_n300_fpga_XG.rpt
- usrp_n310_fpga_AA.bit
- usrp_n310_fpga_AA.bit.md5
- usrp_n310_fpga_AA.dts
- usrp_n310_fpga_AA.dts.md5
- usrp_n310_fpga_AA.rpt
- usrp_n310_fpga_HG.bit
- usrp_n310_fpga_HG.bit.md5
- usrp_n310_fpga_HG.dts
- usrp_n310_fpga_HG.dts.md5
- usrp_n310_fpga_HG.rpt
- usrp_n310_fpga_WX.bit
- usrp_n310_fpga_WX.bit.md5
- usrp_n310_fpga_WX.dts
- usrp_n310_fpga_WX.dts.md5
- usrp_n310_fpga_WX.rpt
- usrp_n310_fpga_XG.bit
- usrp_n310_fpga_XG.bit.md5
- usrp_n310_fpga_XG.dts
- usrp_n310_fpga_XG.dts.md5
- usrp_n310_fpga_XG.rpt
- usrp_n320_fpga_AA.bit
- usrp_n320_fpga_AA.bit.md5
- usrp_n320_fpga_AA.dts
- usrp_n320_fpga_AA.dts.md5
- usrp_n320_fpga_AA.rpt
- usrp_n320_fpga_AQ.bit
- usrp_n320_fpga_AQ.bit.md5
- usrp_n320_fpga_AQ.dts
- usrp_n320_fpga_AQ.dts.md5
- usrp_n320_fpga_AQ.rpt
- usrp_n320_fpga_HG.bit
- usrp_n320_fpga_HG.bit.md5
- usrp_n320_fpga_HG.dts
- usrp_n320_fpga_HG.dts.md5
- usrp_n320_fpga_HG.rpt
- usrp_n320_fpga_WX.bit
- usrp_n320_fpga_WX.bit.md5
- usrp_n320_fpga_WX.dts
- usrp_n320_fpga_WX.dts.md5
- usrp_n320_fpga_WX.rpt
- usrp_n320_fpga_XG.bit
- usrp_n320_fpga_XG.bit.md5
- usrp_n320_fpga_XG.dts
- usrp_n320_fpga_XG.dts.md5
- usrp_n320_fpga_XG.rpt
- usrp_n320_fpga_XQ.bit
- usrp_n320_fpga_XQ.bit.md5
- usrp_n320_fpga_XQ.dts
- usrp_n320_fpga_XQ.dts.md5
- usrp_n320_fpga_XQ.rpt
- usrp_x300_fpga_HG.bit
- usrp_x300_fpga_HG.lvbitx
- usrp_x300_fpga_HG.rpt
- usrp_x300_fpga_XG.bit
- usrp_x300_fpga_XG.lvbitx
- usrp_x300_fpga_XG.rpt
- usrp_x310_fpga_HG.bit
- usrp_x310_fpga_HG.lvbitx
- usrp_x310_fpga_HG.rpt
- usrp_x310_fpga_XG.bit
- usrp_x310_fpga_XG.lvbitx
- usrp_x310_fpga_XG.rpt
- usrp_x410_fpga_CG_400.bit
- usrp_x410_fpga_CG_400.bit.md5
- usrp_x410_fpga_CG_400.dts
- usrp_x410_fpga_CG_400.dts.md5
- usrp_x410_fpga_CG_400.rpt
- usrp_x410_fpga_UC_200.bit
- usrp_x410_fpga_UC_200.bit.md5
- usrp_x410_fpga_UC_200.dts
- usrp_x410_fpga_UC_200.dts.md5
- usrp_x410_fpga_UC_200.rpt
- usrp_x410_fpga_X4_200.bit
- usrp_x410_fpga_X4_200.bit.md5
- usrp_x410_fpga_X4_200.dts
- usrp_x410_fpga_X4_200.dts.md5
- usrp_x410_fpga_X4_200.rpt
- usrp_x440_fpga_CG_1600.bit
- usrp_x440_fpga_CG_1600.bit.md5
- usrp_x440_fpga_CG_1600.dts
- usrp_x440_fpga_CG_1600.dts.md5
- usrp_x440_fpga_CG_1600.rpt
- usrp_x440_fpga_CG_400.bit
- usrp_x440_fpga_CG_400.bit.md5
- usrp_x440_fpga_CG_400.dts
- usrp_x440_fpga_CG_400.dts.md5
- usrp_x440_fpga_CG_400.rpt
- usrp_x440_fpga_X4_1600.bit
- usrp_x440_fpga_X4_1600.bit.md5
- usrp_x440_fpga_X4_1600.dts
- usrp_x440_fpga_X4_1600.dts.md5
- usrp_x440_fpga_X4_1600.rpt
- usrp_x440_fpga_X4_200.bit
- usrp_x440_fpga_X4_200.bit.md5
- usrp_x440_fpga_X4_200.dts
- usrp_x440_fpga_X4_200.dts.md5
- usrp_x440_fpga_X4_200.rpt
- usrp_x440_fpga_X4_400.bit
- usrp_x440_fpga_X4_400.bit.md5
- usrp_x440_fpga_X4_400.dts
- usrp_x440_fpga_X4_400.dts.md5
- usrp_x440_fpga_X4_400.rpt
- images/
- uhd/
- share/
Sources on Pagure