uhd-firmware-4.9.0.0-2.el10_2 in Fedora EPEL 10.2
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Package Info
🠗 Changelog
🠗 Dependencies
🠗 Provides
🠗 Files
Changelog
| Date | Author | Change |
|---|---|---|
| 2025-09-19 | Python Maint <python dash maint at redhat dot com> - 4.9.0.0-2 | - Rebuilt for Python 3.14.0rc3 bytecode |
| 2025-09-11 | Jaroslav Škarvada <jskarvad at redhat dot com> - 4.9.0.0-1 | - New version Resolves: rhbz#2387862 |
| 2025-08-15 | Python Maint <python dash maint at redhat dot com> - 4.8.0.0-4 | - Rebuilt for Python 3.14.0rc2 bytecode |
| 2025-07-25 | Fedora Release Engineering <releng at fedoraproject dot org> - 4.8.0.0-3 | - Rebuilt for https://fedoraproject.org/wiki/Fedora_43_Mass_Rebuild |
| 2025-06-03 | Python Maint <python dash maint at redhat dot com> - 4.8.0.0-2 | - Rebuilt for Python 3.14 |
| 2025-03-12 | Jaroslav Škarvada <jskarvad at redhat dot com> - 4.8.0.0-1 | - New version Resolves: rhbz#2337610 Resolves: rhbz#2341478 |
| 2025-02-11 | Zbigniew Jędrzejewski-Szmek <zbyszek at in dot waw dot pl> - 4.7.0.0-5 | - Add sysusers.d config file to allow rpm to create users/groups automatically |
| 2025-01-19 | Fedora Release Engineering <releng at fedoraproject dot org> - 4.7.0.0-4 | - Rebuilt for https://fedoraproject.org/wiki/Fedora_42_Mass_Rebuild |
| 2024-07-25 | Miroslav Suchý <msuchy at redhat dot com> - 4.7.0.0-3 | - convert license to SPDX |
| 2024-07-20 | Fedora Release Engineering <releng at fedoraproject dot org> - 4.7.0.0-2 | - Rebuilt for https://fedoraproject.org/wiki/Fedora_41_Mass_Rebuild |
Dependencies
- uhd = 4.9.0.0-2.el10_2
Provides
- uhd-firmware
Files
- usr/
- share/
- uhd/
- images/
- LICENSE
- bit/
- usrp_n200_r3_fpga.bit
- usrp_n200_r4_fpga.bit
- usrp_n210_r3_fpga.bit
- usrp_n210_r4_fpga.bit
- erllc_uhd.cat
- erllc_uhd_b100.inf
- erllc_uhd_b200.inf
- erllc_uhd_b200_reinit.inf
- erllc_uhd_b200mini.inf
- erllc_uhd_b205mini.inf
- erllc_uhd_b206mini.inf
- erllc_uhd_makecat.cdf
- erllc_uhd_ni29xx.inf
- erllc_uhd_usrp1.inf
- inventory.json
- octoclock_bootloader.hex
- octoclock_r4_fw.hex
- usrp1_fpga.rbf
- usrp1_fpga_4rx.rbf
- usrp1_fw.ihx
- usrp2_fpga.bin
- usrp2_fw.bin
- usrp_b100_fpga.bin
- usrp_b100_fpga_2rx.bin
- usrp_b100_fw.ihx
- usrp_b200_bl.img
- usrp_b200_fpga.bin
- usrp_b200_fpga.rpt
- usrp_b200_fw.hex
- usrp_b200mini_fpga.bin
- usrp_b200mini_fpga.rpt
- usrp_b205mini_fpga.bin
- usrp_b205mini_fpga.rpt
- usrp_b210_fpga.bin
- usrp_b210_fpga.rpt
- usrp_e310_sg1_fpga.bit
- usrp_e310_sg1_fpga.bit.md5
- usrp_e310_sg1_fpga.dts
- usrp_e310_sg1_fpga.dts.md5
- usrp_e310_sg1_fpga.rpt
- usrp_e310_sg1_idle_fpga.bit
- usrp_e310_sg1_idle_fpga.bit.md5
- usrp_e310_sg1_idle_fpga.dts
- usrp_e310_sg1_idle_fpga.dts.md5
- usrp_e310_sg1_idle_fpga.rpt
- usrp_e310_sg3_fpga.bit
- usrp_e310_sg3_fpga.bit.md5
- usrp_e310_sg3_fpga.dts
- usrp_e310_sg3_fpga.dts.md5
- usrp_e310_sg3_fpga.rpt
- usrp_e310_sg3_idle_fpga.bit
- usrp_e310_sg3_idle_fpga.bit.md5
- usrp_e310_sg3_idle_fpga.dts
- usrp_e310_sg3_idle_fpga.dts.md5
- usrp_e310_sg3_idle_fpga.rpt
- usrp_e320_fpga_1G.bit
- usrp_e320_fpga_1G.bit.md5
- usrp_e320_fpga_1G.dts
- usrp_e320_fpga_1G.dts.md5
- usrp_e320_fpga_1G.rpt
- usrp_e320_fpga_AA.bit
- usrp_e320_fpga_AA.bit.md5
- usrp_e320_fpga_AA.dts
- usrp_e320_fpga_AA.dts.md5
- usrp_e320_fpga_AA.rpt
- usrp_e320_fpga_XG.bit
- usrp_e320_fpga_XG.bit.md5
- usrp_e320_fpga_XG.dts
- usrp_e320_fpga_XG.dts.md5
- usrp_e320_fpga_XG.rpt
- usrp_n200_fw.bin
- usrp_n200_r2_fpga.bin
- usrp_n200_r3_fpga.bin
- usrp_n200_r4_fpga.bin
- usrp_n210_fw.bin
- usrp_n210_r2_fpga.bin
- usrp_n210_r3_fpga.bin
- usrp_n210_r4_fpga.bin
- usrp_n300_fpga_AA.bit
- usrp_n300_fpga_AA.bit.md5
- usrp_n300_fpga_AA.dts
- usrp_n300_fpga_AA.dts.md5
- usrp_n300_fpga_AA.rpt
- usrp_n300_fpga_HG.bit
- usrp_n300_fpga_HG.bit.md5
- usrp_n300_fpga_HG.dts
- usrp_n300_fpga_HG.dts.md5
- usrp_n300_fpga_HG.rpt
- usrp_n300_fpga_WX.bit
- usrp_n300_fpga_WX.bit.md5
- usrp_n300_fpga_WX.dts
- usrp_n300_fpga_WX.dts.md5
- usrp_n300_fpga_WX.rpt
- usrp_n300_fpga_XG.bit
- usrp_n300_fpga_XG.bit.md5
- usrp_n300_fpga_XG.dts
- usrp_n300_fpga_XG.dts.md5
- usrp_n300_fpga_XG.rpt
- usrp_n310_fpga_AA.bit
- usrp_n310_fpga_AA.bit.md5
- usrp_n310_fpga_AA.dts
- usrp_n310_fpga_AA.dts.md5
- usrp_n310_fpga_AA.rpt
- usrp_n310_fpga_HG.bit
- usrp_n310_fpga_HG.bit.md5
- usrp_n310_fpga_HG.dts
- usrp_n310_fpga_HG.dts.md5
- usrp_n310_fpga_HG.rpt
- usrp_n310_fpga_WX.bit
- usrp_n310_fpga_WX.bit.md5
- usrp_n310_fpga_WX.dts
- usrp_n310_fpga_WX.dts.md5
- usrp_n310_fpga_WX.rpt
- usrp_n310_fpga_XG.bit
- usrp_n310_fpga_XG.bit.md5
- usrp_n310_fpga_XG.dts
- usrp_n310_fpga_XG.dts.md5
- usrp_n310_fpga_XG.rpt
- usrp_n320_fpga_AA.bit
- usrp_n320_fpga_AA.bit.md5
- usrp_n320_fpga_AA.dts
- usrp_n320_fpga_AA.dts.md5
- usrp_n320_fpga_AA.rpt
- usrp_n320_fpga_AQ.bit
- usrp_n320_fpga_AQ.bit.md5
- usrp_n320_fpga_AQ.dts
- usrp_n320_fpga_AQ.dts.md5
- usrp_n320_fpga_AQ.rpt
- usrp_n320_fpga_HG.bit
- usrp_n320_fpga_HG.bit.md5
- usrp_n320_fpga_HG.dts
- usrp_n320_fpga_HG.dts.md5
- usrp_n320_fpga_HG.rpt
- usrp_n320_fpga_WX.bit
- usrp_n320_fpga_WX.bit.md5
- usrp_n320_fpga_WX.dts
- usrp_n320_fpga_WX.dts.md5
- usrp_n320_fpga_WX.rpt
- usrp_n320_fpga_XG.bit
- usrp_n320_fpga_XG.bit.md5
- usrp_n320_fpga_XG.dts
- usrp_n320_fpga_XG.dts.md5
- usrp_n320_fpga_XG.rpt
- usrp_n320_fpga_XQ.bit
- usrp_n320_fpga_XQ.bit.md5
- usrp_n320_fpga_XQ.dts
- usrp_n320_fpga_XQ.dts.md5
- usrp_n320_fpga_XQ.rpt
- usrp_x300_fpga_HG.bit
- usrp_x300_fpga_HG.lvbitx
- usrp_x300_fpga_HG.rpt
- usrp_x300_fpga_XG.bit
- usrp_x300_fpga_XG.lvbitx
- usrp_x300_fpga_XG.rpt
- usrp_x310_fpga_HG.bit
- usrp_x310_fpga_HG.lvbitx
- usrp_x310_fpga_HG.rpt
- usrp_x310_fpga_XG.bit
- usrp_x310_fpga_XG.lvbitx
- usrp_x310_fpga_XG.rpt
- usrp_x410_fpga_CG_400.bit
- usrp_x410_fpga_CG_400.bit.md5
- usrp_x410_fpga_CG_400.dts
- usrp_x410_fpga_CG_400.dts.md5
- usrp_x410_fpga_CG_400.rpt
- usrp_x410_fpga_UC_200.bit
- usrp_x410_fpga_UC_200.bit.md5
- usrp_x410_fpga_UC_200.dts
- usrp_x410_fpga_UC_200.dts.md5
- usrp_x410_fpga_UC_200.rpt
- usrp_x410_fpga_X4_200.bit
- usrp_x410_fpga_X4_200.bit.md5
- usrp_x410_fpga_X4_200.dts
- usrp_x410_fpga_X4_200.dts.md5
- usrp_x410_fpga_X4_200.rpt
- usrp_x440_fpga_CG_1600.bit
- usrp_x440_fpga_CG_1600.bit.md5
- usrp_x440_fpga_CG_1600.dts
- usrp_x440_fpga_CG_1600.dts.md5
- usrp_x440_fpga_CG_1600.rpt
- usrp_x440_fpga_CG_400.bit
- usrp_x440_fpga_CG_400.bit.md5
- usrp_x440_fpga_CG_400.dts
- usrp_x440_fpga_CG_400.dts.md5
- usrp_x440_fpga_CG_400.rpt
- usrp_x440_fpga_X4_1600.bit
- usrp_x440_fpga_X4_1600.bit.md5
- usrp_x440_fpga_X4_1600.dts
- usrp_x440_fpga_X4_1600.dts.md5
- usrp_x440_fpga_X4_1600.rpt
- usrp_x440_fpga_X4_200.bit
- usrp_x440_fpga_X4_200.bit.md5
- usrp_x440_fpga_X4_200.dts
- usrp_x440_fpga_X4_200.dts.md5
- usrp_x440_fpga_X4_200.rpt
- usrp_x440_fpga_X4_400.bit
- usrp_x440_fpga_X4_400.bit.md5
- usrp_x440_fpga_X4_400.dts
- usrp_x440_fpga_X4_400.dts.md5
- usrp_x440_fpga_X4_400.rpt
- images/
- uhd/
- share/
Sources on Pagure