Yosys Open SYnthesis Suite, including Verilog synthesizer
Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains.
Release | Stable | Testing |
---|---|---|
Fedora Rawhide | 0.54-1.20250610gite0747b7.fc43 | - |
Fedora 42 | 0.53-1.20250506git53c22ab.fc42 | 0.54-1.20250610gite0747b7.fc42 |
Fedora 41 | 0.52-1.20250411gitfee39a3.fc41 | - |
You can contact the maintainers of this package via email at
yosys dash maintainers at fedoraproject dot org
.