Yosys Open SYnthesis Suite, including Verilog synthesizer
Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains.
Release | Stable | Testing |
---|---|---|
Fedora Rawhide | 0.40-1.20240411git47bdb3e.fc41 | - |
Fedora 40 | 0.40-1.20240411git47bdb3e.fc40 | 0.39-1.20240314gitb3124f3.fc40 |
Fedora 39 | 0.40-1.20240411git47bdb3e.fc39 | - |
Fedora 38 | 0.40-1.20240411git47bdb3e.fc38 | - |
You can contact the maintainers of this package via email at
yosys dash maintainers at fedoraproject dot org
.