iverilog
Icarus Verilog is a verilog compiler and simulator
Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.
Releases Overview
| Release | Stable | Testing |
|---|---|---|
| Fedora Rawhide | 12.0-8.fc41 | - |
| Fedora 41 | 12.0-8.fc41 | - |
| Fedora 40 | 12.0-7.fc40 | - |
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Package Info
Package Info
- Upstream: https://github.com/steveicarus/iverilog
- License(s): GPLv2
- Maintainer: filiperosset
You can contact the maintainers of this package via email at
iverilog dash maintainers at fedoraproject dot org.
Sources on Pagure